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? semiconductor components industries, llc, 2013 june, 2013 ? rev. 1 1 publication order number: NCV8876/d NCV8876 automotive grade start-stop non-synchronous boost controller the NCV8876 is a non-synchronous boost controller designed to supply a minimum output voltage during start-stop vehicle operation battery voltage sags. the controller drives an external n-channel mosfet. the device uses peak current mode control with internal slope compensation. the ic incorporates an internal regulator that supplies charge to the gate driver. protection features include, cycle-by-cycle current limiting, protection and thermal shutdown. additional features include low quiescent current sleep mode operation. the NCV8876 is enabled when the supply voltage drops below 7.3 v, with boost operation initiated when the supply voltage is below 6.8 v. features ? automatic enable below 7.3 v (factory programmable) ? boost mode operation at 6.8 v ? 2% output accuracy over temperature range ? peak current mode control with internal slope compensation ? externally adjustable frequency operation ? wide input voltage range of 2 v to 40 v, 45 v load dump ? low quiescent current in sleep mode (<11 a typical) ? cycle ? by ? cycle current limit protection ? hiccup ? mode overcurrent protection (ocp) ? thermal shutdown (tsd) ? this is a pb ? free device typical applications ? applications requiring regulated voltage through cranking and start ? stop operation marking diagram http://onsemi.com soic ? 8 d suffix case 751 1 8 pin connections 1 8 2 3 4 7 6 5 (top view) status isns gnd gdrv rosc vc vout vdrv 8876xx = specific device code xx = 00, 01 a = assembly location l = wafer lot y = year w = work week = pb ? free package 8876xx alyw 1 8 device package shipping ? ordering information NCV887600d1r2g soic ? 8 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. NCV887601d1r2g soic ? 8 (pb ? free) 2500 / tape & reel http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 2 + figure 1. typical application figure 2. functional waveforms 7.3 v 6.8 v wakeup threshold wakeup battery in vout regulation 7.7 v sleep threshold gdrv wakeup delay comp comp delay internal clamp (internal signal) voltage gm 6 3 2 4 gnd isns gdrv vout 5 vdrv csa osc q d l sc temp vdrv drive logic cl scp fault logic clk 8 rosc 7 vc pwm wakeup 1 status status v micro c o r sns v o c g v g c c r c c drv v ref r osc c decoupling package pin descriptions pin no. pin symbol function 1 status this is an open ? drain diagnostic. ic status operation flag indicator. this output is a logic low when ic vout is below 7.2 v and device is active. a pull ? up resistor of around 80 k should be connected between status and a microcontroller reference. this output is a logic high when the ic is disabled or in uvlo. ground is left unused. 2 isns current sense input. connect this pin to the source of the external n ? mosfet, through a current ? sense res- istor to ground to sense the switching current for regulation and current limiting. 3 gnd ground reference. 4 gdrv gate driver output. connect to gate of the external n ? mosfet. a series resistance can be added from gdrv to the gate to tailor emc performance. 5 vdrv driving voltage. internally ? regulated supply for driving the external n ? mosfet, sourced from vout. bypass with a 1.0 f ceramic capacitor to ground. 6 vout monitors output voltage and provides ic input voltage. 7 vc output of the voltage error transconductance amplifier. an external compensator network from vc to gnd is used to stabilize the converter. 8 rosc use a resistor to ground to set the frequency. http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 3 absolute maximum ratings (voltages are with respect to gnd, unless otherwise indicated) rating value unit dc supply voltage (vout) ? 0.3 to 40 v peak transient voltage (load dump on vout) 45 v dc supply voltage (vdrv, gdrv) 12 v dc voltage (vc, isns, rosc) ? 0.3 to 3.6 v dc voltage (status) ? 0.3 to 6 v dc voltage stress (vout ? vdrv) ? 0.7 to 40 v operating junction temperature ? 40 to 150 c storage temperature range ? 65 to 150 c peak reflow soldering temperature: pb ? free, 60 to 150 seconds at 217 c 265 peak c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. package capabilities characteristic value unit esd capability (all pins) human body model machine model 2.0 200 kv v moisture sensitivity level 1 package thermal resistance junction ? to ? ambient, r ja (note 1) 100 c/w 1. 1 in 2 , 1 oz copper area used for heatsinking. typical values part no. d max f s s a v cl i src i sink vout sce NCV887600 83% 170 khz 34 mv/ s 400 mv 800 ma 600 ma 6.8 v n NCV887601 83% 170 khz 53 mv/ s 200 mv 800 ma 600 ma 6.8 v n http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 4 electrical characteristics ( ? 40 c < t j < 150 c, 4.25 v < v in < 40 v, unless otherwise specified) min/max values are guaranteed by test, design or statistical correlation. characteristic symbol conditions min typ max unit general quiescent current, sleep mode i q,sleep v out = 13.2 v, t j = 25 c ? 12 14 a quiescent current, no switching i q,off into v out pin, 6.8 v < v out < 7.2 v, no switching ? 2.2 4.0 ma oscillator switching frequency f sw operating range NCV887600 NCV887601 153 153 ? ? 501 501 khz r osc voltage v rosc ? 1.0 ? v default switching f sw rosc = open (NCV887600, NCV887601) rosc = 100 k rosc = 20 k rosc = 10 k 153 180 283 409 170 200 315 455 187 220 347 501 khz minimum pulse width t on,min 90 115 140 ns maximum duty cycle d max rosc = open 81 83 85 % slope compensating ramp s a NCV887600 NCV887601 30 46 34 53 38 60 mv/ s status flag status wake up delay v out < 7.2 v ? 9.3 14.0 s status pull ? down capability sinking 1.0 ma ? ? 400 mv current sense amplifier low ? frequency gain a csa input ? to ? output gain at dc, isns 1 v 0.9 1.0 1.1 v/v bandwidth bw csa gain of a csa ? 3 db 2.5 ? ? mhz isns input bias current i sns,bias out of isns pin ? 30 50 a current limit threshold voltage v cl voltage on isns pin NCV887600 NCV887601 360 180 400 200 440 220 mv current limit, response time t cl cl tripped until gdrv falling edge, v isns = v cl + 40 mv ? 80 125 ns overcurrent protection, threshold voltage %v ocp percent of v cl 125 150 175 % overcurrent protection, response time t ocp from overcurrent event, until switching stops, v isns = v ocp + 40 mv ? 80 125 ns voltage error operational transconductance amplifier transconductance g m,vea v out = 100 mv 0.8 1.2 1.6 ms vea output resistance r o,vea 2.0 ? ? m ? vea maximum output voltage v c,max 2.5 ? ? v vea sourcing current i src,vea vea output current, vc = 2.0 v 80 100 ? a vea sinking current i snk,vea vea output current, vc = 1.5 v 80 100 ? a vea clamp voltage v c,clamp v out < 7.2 v ? 1.1 ? v vc delay v out < 7.2 v ? 53 60 s gate driver sourcing current i src v drv 6 v, NCV887600 v drv ? v gdrv = 2 v NCV887601 550 550 800 800 ? ? ma sinking current i sink v gdrv 2 v NCV887600 NCV887601 500 500 600 600 ? ? ma driving voltage dropout v drv,do v out ? v drv , iv drv = 25 ma ? 0.3 0.6 v driving voltage source current i drv v out ? v drv = 1 v 35 45 ? ma http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 5 electrical characteristics ( ? 40 c < t j < 150 c, 4.25 v < v in < 40 v, unless otherwise specified) min/max values are guaranteed by test, design or statistical correlation. characteristic unit max typ min conditions symbol gate driver backdrive diode voltage drop v d,bd v drv ? v out , i d,bd = 5 ma ? ? 0.7 v driving voltage v drv i vdrv = 0.1 ? 25 ma NCV887600 NCV887601 5.8 5.8 6.0 6.0 6.2 6.2 v uvlo undervoltage lock ? out, threshold voltage v uvlo vout falling 3.4 3.59 3.8 v undervoltage lock ? out, hysteresis v uvlo,hys vout rising 300 440 550 mv thermal shutdown thermal shutdown threshold t sd t j rising 160 170 180 c thermal shutdown hysteresis t sd,hys t j falling 10 15 20 c thermal shutdown delay t sd,dly from t j > t sd to stop switching ? ? 100 ns voltage regulation voltage regulation vout ,reg NCV887600 NCV887601 6.66 6.66 6.8 6.8 6.94 6.94 v threshold ic enable vout descending NCV887600 NCV887601 7.1 7.1 7.3 7.3 7.5 7.5 v threshold ic disable vout ascending NCV887600 NCV887601 7.5 7.5 7.7 7.7 7.9 7.9 v threshold ic enable ? voltage regulation NCV887600 NCV887601 0.32 0.32 0.5 0.5 ? ? v threshold ic disable ? threshold ic enable NCV887600 NCV887601 ? ? 0.4 0.4 ? ? v http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 6 typical characteristics 22 i q,sleep , sleep current ( a) t j , junction temperature ( c) figure 3. sleep current vs. temperature 2.30 ? 50 0 150 50 100 i q,on , quiescent current (ma) t j , junction temperature ( c) figure 4. quiescent current vs. temperature 20 18 16 14 12 10 2.28 2.26 2.24 2.22 2.20 2.18 2.16 2.14 2.12 2.10 v out = 13.2 v f s = 170 khz 119 t on,min , minimum on time (ns) t j , junction temperature ( c) figure 5. minimum on time vs. temperature ? 50 0 150 50 100 118 117 116 115 114 113 112 111 110 109 1.010 normalized current limit t j , junction temperature ( c) figure 6. normalized current vs. temperature ? 50 0 150 50 100 1.005 1.000 0.995 0.990 6.84 vout regulation t j , junction temperature ( c) figure 7. vout regulation vs. temperature ? 50 0 150 50 100 6.83 6.82 6.81 6.80 6.79 6.78 169.0 switching frequency (khz) t j , junction temperature ( c) figure 8. switching frequency vs. temperature ? 50 0 150 50 100 168.8 168.6 168.4 168.2 168.0 167.8 167.6 167.4 167.2 167.0 r osc = open ? 50 0 150 50 100 v out = 13.2 v http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 7 4.1 uvlo threshold (v) t j , junction temperature ( c) figure 9. uvlo threshold vs. temperature ? 50 0 150 50 100 4.0 3.9 3.8 3.7 3.6 3.5 vout rising vout falling 4.1 threshold ic voltage (v) t j , junction temperature ( c) figure 10. threshold ic voltage vs. temperature ? 50 0 15 0 50 100 4.0 3.9 3.8 3.7 3.6 3.5 enable disable http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 8 theory of operation + figure 11. current mode control schematic oscillator slope compensation q s r NCV8876 voltage error vea csa pwm comparator gate drive compensation l isns gdrv vout wakeup rosc status status v micro r l c o v out v in r sns r osc regulation the NCV8876 is a non ? synchronous boost controller designed to supply a minimum output voltage during start ? stop vehicle operation battery voltage sags. the NCV8876 is in low quiescent current sleep mode under normal battery operation (12 v) and is enabled when the supply voltage drops below the descending threshold (7.2 v for the NCV887600). boost operation is initiated when the supply voltage is below the regulation set point (6.8 v for the NCV887600). once the supply voltage sag condition ends and begins to increase, the NCV8876 boost operation will cease when the supply voltage increases beyond the regulation set point. the NCV8876 low quiescent current sleep mode resumes once the supply voltage increases beyond the ascending voltage threshold (7.6 v for the NCV887600). the NCV8876 vout pin serves the dual purpose: (1) powering the NCV8876 and (2) providing the regulation feedback signal. the feedback network is imbedded within the ic to eliminate the constant current battery drain that would exist with the use of external voltage feedback resistors. there is no soft ? start operating mode. the NCV8876 will instantly respond to a voltage sag so as to maintain normal operation of downstream loads. once the NCV8876 is enabled, the voltage error operational transconductance amplifier supplies current to set vc to 1.1 v to minimize the feedback loop response time when the battery voltage sag goes below the regulation set point. current mode control the NCV8876 incorporates a current mode control scheme, in which the pwm ramp signal is derived from the power switch current. this ramp signal is compared to the output of the error amplifier to control the on ? time of the power switch. the oscillator is used as a fixed ? frequency clock to ensure a constant operational frequency. the resulting control scheme features several advantages over conventional voltage mode control. first, derived directly from the inductor, the ramp signal responds immediately to line voltage changes. this eliminates the delay caused by the output filter and the error amplifier, which is commonly found in voltage mode controllers. the second benefit comes from inherent pulse ? by ? pulse current limiting by merely clamping the peak switching current. finally, since current mode commands an output current rather than voltage, the filter offers only a single pole to the feedback loop. this allows for a simpler compensation. the NCV8876 also includes a slope compensation scheme in which a fixed ramp generated by the oscillator is added to the current ramp. a proper slope rate is provided to improve circuit stability without sacrificing the advantages of current mode control. current limit the NCV8876 features two current limit protections, peak current mode and over current latch off. when the current sense amplifier detects a voltage above the peak current limit between isns and gnd after the current limit leading edge blanking time, the peak current limit causes the power switch to turn off for the remainder of the cycle. set the current limit with a resistor from isns to gnd, with r = v cl / i limit . if the voltage across the current sense resistor exceeds the over current threshold voltage the device enters over current hiccup mode. the device will remain off for the hiccup time and then go through the soft ? start procedure. http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 9 uvlo input undervoltage lockout (uvlo) is provided to ensure that unexpected behavior does not occur when vin is too low to support the internal rails and power the controller. the ic will start up when enabled and vin surpasses the uvlo threshold plus the uvlo hysteresis and will shut down when vin drops below the uvlo threshold or the part is disabled. vdrv an internal regulator provides the drive voltage for the gate driver. bypass with a ceramic capacitor to ground to ensure fast turn on times. the capacitor should be between 0.1 f and 1 f, depending on switching speed and charge requirements of the external mosfet. vdrv uses an internal linear regulator to charge the vdrv bypass capacitor . vout must be decoupled at the ic by a capacitor that is equal or larger in value than the vdrv decoupling capacitor. application information design methodology this section details an overview of the component selection process for the NCV8876 in continuous conduction mode boost. it is intended to assist with the design process but does not remove all engineering design work. many of the equations make heavy use of the small ripple approximation. this process entails the following steps: 1. define operational parameters 2. select operating frequency 3. select current sense resistor 4. select output inductor 5. select output capacitors 6. select input capacitors 7. select compensator components 8. select mosfet(s) 9. select diode 1. define operational parameters before beginning the design, define the operating parameters of the application. these include: v in(min) : minimum input voltage [v] v in(max): maximum input voltage [v] v out : output voltage [v] i out(max) : maximum output current [a] i cl : desired typical cycle-by-cycle current limit [a] from this the ideal minimum and maximum duty cycles can be calculated as follows: d min 1 v in(max) v out d max 1 v in(min) v out both duty cycles will actually be higher due to power loss in the conversion. the exact duty cycles will depend on conduction and switching losses. if the maximum input voltage is higher than the output voltage, the minimum duty cycle will be negative. this is because a boost converter cannot have an output lower than the input. in situations where the input is higher than the output, the output will follow the input, minus the diode drop of the output diode and the converter will not attempt to switch. if the calculated d max is higher the d max of the NCV8876, the conversion will not be possible. it is important for a boost converter to have a restricted d max , because while the ideal conversion ration of a boost converter goes up to infinity as d approaches 1, a real converter?s conversion ratio starts to decrease as losses overtake the increased power transfer. if the converter is in this range it will not be able to regulate properly. if the following equation is not satisfied, the device will skip pulses at high v in : d min f s t on(min) where: f s : switching frequency [hz] t on(min) : minimum on time [s] 2. select operating frequency the default setting is an open rosc pin, allowing the oscillator to operate at the default frequency f s . adding a resistor to gnd increases the switching frequency. the graph in figure 12, below, shows the required resistance to program the frequency. from 200 khz to 500 khz, the following formula is accurate to within 3% of the expected figure 12. r osc vs. f sw 100 90 80 70 60 50 40 30 20 10 0 150 200 250 500 450 400 350 300 f sw (khz) r osc (k ) 550 r osc 2859 ( f sw 170 ) where: f sw : switching frequency [khz] r osc : resistor from rosc pin to gnd [k] note: the r osc resistor ground return to the NCV8876 pin 3 must be independent of power grounds. 3. select current sense resistor current sensing for peak current mode control and current limit relies on the mosfet current signal, which is http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 10 measured with a ground referenced amplifier. the easiest method of generating this signal is to use a current sense resistor from the source of the mosfet to device ground. the sense resistor should be selected as follows: r s v cl i cl where: r s : sense resistor [ ] v cl : current limit threshold voltage [v] i cl : desire current limit [a] 4. select output inductor the output inductor controls the current ripple that occurs over a switching period. a high current ripple will result in excessive power loss and ripple current requirements. a low current ripple will result in a poor control signal and a slow current slew rate in case of load steps. a good starting point for peak to peak ripple is around 10% of the inductor current at the maximum load at the worst case v in , but operation should be verified empirically. the worst case v in is half of v out , or whatever v in is closest to half of v in . after choosing a peak current ripple value, calculate the inductor value as follows: l v in(wc) 2 d wc i l,max f s v out where: v in(wc) : v in value as close as possible to half of v out [v] d wc : duty cycle at v in(wc) i l,max : maximum peak to peak ripple [a] the maximum average inductor current can be calculated as follows: i l,avg v out i out(max) v in(min) the peak inductor current can be calculated as follows: i l,peak i l,avg v in(min) 2 d max l f s v out where: i l,peak : peak inductor current value [a] 5. select output capacitors the output capacitors smooth the output voltage and reduce the overshoot and undershoot associated with line transients. the steady s tate output ripple associated with the output capacitors can be calculated as follows: i out(max) v out v in(min) c out f 2 i out(max) v out r esr v in(min) v out(ripple) the capacitors need to survive an rms ripple current as follows: i cout(rms) i out v out v in(min) v in(min) the use of parallel ceramic bypass capacitors is strongly encouraged to help with the transient response. 6. select input capacitors the input capacitor reduces voltage ripple on the input to the module associated with the ac component of the input current. i cin(rms) v in(wc) 2 d wc l f s v out 23 7. select compensator components current mode control method employed by the NCV8876 allows the use of a simple, t ype ii compensation to optimize the dynamic response according to system requirements. 8. select mosfet(s) in order to ensure the gate drive voltage does not drop out the mosfet(s) chosen must not violate the following inequality: q g(total)
i drv f s where: q g(total) : total gate charge of mosfet(s) [c] i drv : drive voltage current [a] f s : switching frequency [hz] the maximum rms current can be calculated as follows: i d(max) i out d d the maximum voltage across the mosfet will be the maximum output voltage, which is the higher of the maximum input voltage and the regulated output voltaged: v q(max) v out(max) 9. select diode the output diode rectifies the output current. the average current through diode will be equal to the output current: i d(avg) i out(max) additionally, the diode must block voltage equal to the higher of the output voltage and the maximum input voltage: v d(max) v out(max) the maximum power dissipation in the diode can be calculated as follows: p d v f (max) i out(max) where: p d : power dissipation in the diode [w] v f(max) : maximum forward voltage of the diode [v] http://www..net/ datasheet pdf - http://www..net/
NCV8876 http://onsemi.com 11 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCV8876/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative http://www..net/ datasheet pdf - http://www..net/

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